Every AMD GPU this site talks about has two names. The sticker name is for buying (Radeon AI PRO R9700).[4]The gfx ID is the LLVM target the compiler and the wheels care about. On ROCm 10.1.0’s hardware table the R9700 is gfx1201, architecture RDNA 4.[1]
The living card list — VRAM, official vs unofficial, and per-SKU override notes — is theGPU directory. This page explains the IDs.
RDNA vs CDNA
AMD ships two compute-relevant GPU families in current ROCm notes:
- RDNA — the Radeon (and Ryzen iGPU) line. Consumer and workstation cards you can actually buy for a home lab. The 10.1.0 table labels R9700 / RX 9070-class as RDNA 4 (
gfx1201), RX 7900-class as RDNA 3 (gfx1100/1101/1102), and older PRO parts such as W6800 as RDNA 2 (gfx1030).[1] - CDNA — the Instinct datacenter line. Same ROCm docs, different SKUs, often different OS/kernel footnotes. Do not copy an Instinct install row onto a Radeon and assume the kernels match.
Wavefront width and matrix-core details differ across those families. The 10.1.0 notes even call out rocSPARSE work that is wave32-aware on RDNA 4 (gfx1201) and leaves wave64 (CDNA) behavior unchanged.[1]You do not need to memorize wave sizes. You do need to install the package suffix that matches your family — gfx1201 for an R9700, gfx110x for a 7900 — as theinstall tutorial describes.
gfx IDs you will actually type
From the ROCm 10.1.0 device table (Radeon rows), plus this site’s directory. Re-read the10.1.0 notesand the compatibility matrixon install day.[1][2]
| gfx | Arch | Example SKUs on the 10.1 table |
|---|---|---|
gfx1201 | RDNA 4 | Radeon AI PRO R9700 / R9700S / R9600D / R9600; RX 9070 XT / GRE / 9070 |
gfx1200 | RDNA 4 | RX 9060 XT (and XT LP), RX 9060, RX 9050 |
gfx1100 | RDNA 3 | RX 7900 XTX / XT / GRE; W7900; W7800 |
gfx1101 | RDNA 3 | RX 7800 XT / 7700 XT / 7700; W7700; PRO V710 |
gfx1102 | RDNA 3 | RX 7600 |
gfx1030 | RDNA 2 | PRO W6800; PRO V620. Consumer 6950 XT is not the same official row — see the directory. |
Ryzen AI iGPUs have their own gfx IDs (gfx1150, gfx1151,gfx1103, …) on the same 10.1.0 table.[1]If llama-cli --list-devices shows an iGPU next to a discrete R9700, pick the discrete device. The directory does not list every APU; it lists the cards a home lab actually shops.
Why the gfx target matters
A HIP binary, a PyTorch wheel, and a vLLM image each ship GPU code objects for alist of targets. If your card’s gfx is not on that list, the runtime has no kernel to launch. Typical symptoms: hipErrorNoBinaryForGpu, a library looking for tensiles in the wrong directory, or a silent CPU fallback (VRAM meter never moves).
That is why this site’s llama.cpp HIP configure line sets AMDGPU_TARGETS=gfx1201on an R9700, and why “I installed ROCm” is not the same as “this wheel lists my ISA.” Official support is the matrix / notes row.[2][3]Community “it ran” is something else. We label them separately.
HSA_OVERRIDE_GFX_VERSION
HSA_OVERRIDE_GFX_VERSION is an unofficial environment variable some people set so a process will load code objects built for a nearby gfx. The usual example in ROCm issue threads is 10.3.0 so a gfx1031 card (RX 6700-class) usesgfx1030 objects.[5]
Format in that community usage is MAJOR.MINOR.PATCH (for example10.3.0 ↔ gfx1030). It applies to the process — it is not a per-GPU switch on a mixed machine.
Go deeperIs this in the official environment-variable list?
AMD’s ROCR docs have an environment-variables reference.[6]The specific path we tried (…/ROCR-Runtime/en/latest/reference/environment-variables.html) returned 404 on 2026-10-12. We do not claim HSA_OVERRIDE is an official, documented ROCr knob. Until an official page lists it, treat it as community-only.
Other HSA_* names exist for WSL2 detection in the 10.1.0 notes (HSA_ENABLE_DXG_DETECTION).[1]That is a different variable.
Card-by-card override notes: GPU directory. Tracker rows:HSA_OVERRIDE unofficial,gfx1031. If a log looks like a gfx mismatch, paste it in the error matcher.
Sources
Every version and support claim on this page points here. If a sentence has no mark, treat it as lab opinion or a TODO — not as AMD policy.